CDC Cyber 6000/7000/70/170/180 SCOPE/NOS data formats ===================================================== Machine words are 60 bit. One's complement is used in all arithmetic. There exists a +0=all zeros and a -0=all ones. Word formats are integer 60 bit, uppermost bit 59=sign bit float 12 bit of exponent and 48 bit of coefficient character 10 characters of 6 bit each instructions 15 bit or 30 bit, 2/3/4 per word, called parcels CPU Registers ------------- There are 8 each of X (data), A (address) and B (index) registers. X registers are 60 bit, A and B registers are 18 bit. Since bit number 17 is the sign bit the maximum positive value is 128k-1=131071 dec which therefore is the maximum adressable memory location per program. B0=0 always guaranteed by hardware. Writes to B0 are ignored. Any modification of A1...A5 results in load of (A1)...(A5) into X1...X5. Any modification of A6, A7 results in store of X6, X7 into (A6), (A7). Further registers are P program counter RA reference address = absolute memory relocation FL field length EM exit mode RAECS extended storage reference address = relocation FLECS extended storage field length MA monitor exchange address The exchange jump instruction stores the complete processor state = set of above registers as an exchange package in memory. Instruction Formats ------------------- The 60 bit word may hold any possible combination of 15-bit or 30-bit instructions. Opcodes are 6 bit. Machine operations are three address. OPijk is the 15-bit instruction format, where i, j, k are 3-bit register specifications. OPijK is the 30-bit instruction format, where i, j are 3-bit register specifications or opcode extension and K is an 18-bit constant, which may be negative. Packing of instruction parcels into 60-bit words is automatic with suitable padding, done by the assembler/compiler. COMPASS assembly language statement format ------------------------------------------ col. 1 * (asterisk) indicates comment line col. 2-10 label col. 11-17 operation col. 18-29 variable col. 30-80 comment COMPASS pseudo instructions (incomplete) ---------------------------------------- subtl TITLE string define string as title and subtl as subtitle IDENT name subprogram identification ENTRY name declaration of entrypoint name EXT sym declare sym external BASE mode O=octal D=decimal M=mixed sym SET expr set value of sym to expr USE /name/ assemble subsequent statments into common block USE * revert to prior block sym BSS expr define expr storage words at start address sym sym BSSZ expr same, generate zero preset words sym DATA a,b,c,... generate data words with values a, b, c, ... sym DIS n,string define n words of characters string (10/word) sym DIS ,dstringd define string delimited by d, zero terminated sym VFD size1/value1,size2/value2,size3/value3,... variable field def END name specification of start address name Machine instructions -------------------- Operation Variable Octal Size Description PS K 0000K 30 Exchange jump to (MA) [program stop] RJ K 0100K 30 Return jump to K store unconditional jump to P+1 at K continue execution at K+1 RE Bj+K 011jK 30 read extended storage read (X0) to (A0), (Bj)+K words WE Bj+K 012jK 30 write extended storage write (A0) to (X0), (Bj)+K words XJ Bj+K 013jK 30 exchange jump to (Bj)+K RXj Xk 014jk 15 read extended storage (Xk) into Xj WXj Xk 015jk 15 write (Xj) into extended storage (Xk) JP Bi+K 02i0K 30 jump to (Bi)+K ZR Xj,K 030jK 30 branch to K if (Xj) == 0 NZ Xj,K 031jK 30 branch to K if (Xj) != 0 PL Xj,K 032jK 30 branch to K if (Xj) positive NG Xj,K 033jK 30 branch to K if (Xj) negative MI Xj,K 033jK 30 branch to K if (Xj) negative IR Xj,K 034jK 30 branch to K if (Xj) in range OR Xj,K 035jK 30 branch to K if (Xj) out of range DF Xj,K 036jK 30 branch to K if (Xj) definite ID Xj,K 037jK 30 branch to K if (Xj) indefinite ZR Bi,K 04i0K 30 branch to K if (Bi) == 0 i=0 unconditional EQ Bi,K 04i0K 30 branch to K if (Bi) == 0 i=0 unconditional EQ Bi,Bj,K 04ijK 30 branch to K if (Bi) == (Bj) NE Bi,K 05i0K 30 branch to K if (Bi) != 0 NE Bi,Bj,K 05ijK 30 branch to K if (Bi) != (Bj) NZ Bi,K 05i0K 30 branch to K if (Bi) != 0 PL Bi,K 06i0K 30 branch to K if (Bi) >= 0 GE Bi,Bj,K 06ijk 30 branch to K if (Bi) >= (Bj) LE Bj,Bi,K 06ijk 30 branch to K if (Bj) <= (Bi) NG Bi,K 07i0K 30 branch to K if (Bi) < 0 MI Bi,K 07i0K 30 branch to K if (Bi) < 0 GT Bj,Bi,K 07ijK 30 branch to K if (Bj) > (Bi) LT Bi,Bj,K 07ijK 30 branch to K if (Bi) < (Bj) BXi Xj 10ijj 15 transmit (Xj) to Xi BXi Xj*Xk 11ijk 15 logical product (Xj) and (Xk) to Xi BXi Xj+Xk 12ijk 15 logical sum (Xj) or (Xk) to Xi BXi Xj-Xk 13ijk 15 logical difference (Xj) xor (Xk) to Xi BXi -Xk 14ikk 15 complement of (Xk) to Xi BXi -Xk*Xj 15ijk 15 logical product (Xj) and complement (Xk) to Xi BXi -Xk+Xj 16ijk 15 logical sum (Xj) or complement (Xk) to Xi BXi -Xk-Xj 17ijk 15 logical difference (Xj) xor compl (Xk) to Xi LXi jk 20ijk 15 logical left shift (Xk) by jk circular AXi jk 21ijk 15 arithmetic right shift (Xk) by jk LXi Xk,Bj LXi Bj,Xk 22ijk 15 logicel left shift (Xk) by (Bj) circular to Xi LXi -Bj,Xk LXi Xk,-Bj 23ijk 15 arithmetic right shift (Xk) by (Bj) to Xi AXi Xk,Bj AXi Bj,Xk 23ijk 15 arithmetic right shift (Xk) by (Bj) to Xi AXi -Bj,Xk AXi Xk,-Bj 22ijk 15 logical left shift (Xk) by (Bj) circular to Xi NXi Bj,Xk NXi Xk,Bj 24ijk 15 normalize (Xk) to Xi, shift count to Bj ZXi Bj,Xk ZXi Xk,Bj 25ijk 15 round and normalize (Xk) to Xi, sft cnt to Bj UXi Bj,Xk UXi Xk,Bj 26ijk 15 unpack (Xk) to Xi(coeff) and Bj(exponent) PXi Bj,Xk PXi Xk,Bj 27ijk 15 pack (Xk) coeff and (Bj) expon to Xi FXi Xj+Xk 30ijk 15 unrounded F.P. add (Xj) plus (Xk) to Xi FXi Xj-Xk 31ijk 15 unrounded F.P. difference (Xj) minus (Xk) to Xi DXi Xj+Xk 32ijk 15 lower half of D.P. add (Xj) plus (Xk) to Xi DXi Xj-Xk 33ijk 15 lower half of D.P. (Xj) minus (Xk) to Xi RXi Xj+Xk 34ijk 15 rounded F.P. add (Xj) plus (Xk) to Xi RXi Xj-Xk 35ijk 15 rounded F.P. difference (Xj) minus (Xk) to Xi LXi Xj+Xk 36ijk 15 long (integer) add (Xj) plus (Xk) to Xi LXi Xj-Xk 37ijk 15 long (integer) diff (Xj) minus (Xk) to Xi FXi Xj*Xk 40ijk 15 unrounded F.P. multiply (Xj)*(Xk) to Xi RXi Xj*Xk 41ijk 15 rounded F.P. multiply (Xj)*(Xk) to Xi DXi Xj*Xk 42ijk 15 lower half od D.P. product (Xj)*(Xk) to Xi IXi Xj*Xk 42ijk 15 integer 48-bit multiply (Xj)*(Xk) to Xi MXi jk 43ijk 15 generate (Xi)=jk one bits, (60-jk) zero bits FXi Xj/Xk 44ijk 15 unrounded F.P. divide (Xj)/(Xk) to Xi RXi Xj/Xk 45ijk 15 rounded F.P. divide (Xj)/(Xk) to Xi NO 46000 15 pass, no-operation 46ijk 30/60 CMU unit instructions, ijk > 400 CXi Xk 47ikk 15 population count (Xk) to Xi, count one bits SAi Aj+K 50ijK 30 set Ai to (Aj)+K, possible storage reference SAi Bj+K 51ijk 30 set Ai to (Bj)+K, possible storage reference SAi Xj+K 52ijk 30 set Ai to (Xj)+K, possible storage reference SAi Xj+Bk SAi Bk+Xj 53ijk 15 set Ai to (Xj)+(Bk), poss. storage reference SAi Aj+Bk SAi Bk+Aj 54ijk 15 set Ai to (Aj)+(Bk), poss. storage reference SAi Aj-Bk SAi -Bk+Aj 55ijk 15 set Ai to (Aj)-(Bk), poss. storage reference SAi Bj+Bk 56ijk 15 set Ai to (Bj)+(Bk), poss. storage reference SAi Bj-Bk SAi -Bk+Bj 57ijk 15 set Ai to (Bj)-(Bk), poss. storage reference SBi Aj+K 60ijK 30 set Bi to (Aj)+K SBi Bj+K 61ijk 30 set Bi to (Bj)+K SBi Xj+K 62ijk 30 set Bi to (Xj)+K SBi Xj+Bk SBi Bk+Xj 63ijk 15 set Bi to (Xj)+(Bk) SBi Aj+Bk SBi Bk+Aj 64ijk 15 set Bi to (Aj)+(Bk) SBi Aj-Bk SBi -Bk+Aj 65ijk 15 set Bi to (Aj)-(Bk) SBi Bj+Bk 66ijk 15 set Bi to (Bj)+(Bk) SBi Bj-Bk SBi -Bk+Bj 67ijk 15 set Bi to (Bj)-(Bk) SXi Aj+K 70ijK 30 set Xi to (Aj)+K SXi Bj+K 71ijk 30 set Xi to (Bj)+K SXi Xj+K 72ijk 30 set Xi to (Xj)+K SXi Xj+Bk SXi Bk+Xj 73ijk 15 set Xi to (Xj)+(Bk) SXi Aj+Bk SXi Bk+Aj 74ijk 15 set Xi to (Aj)+(Bk) SXi Aj-Bk SXi -Bk+Aj 75ijk 15 set Xi to (Aj)-(Bk) SXi Bj+Bk 76ijk 15 set Xi to (Bj)+(Bk) SXi Bj-Bk SXi -Bk+Bj 77ijk 15 set Xi to (Bj)-(Bk)